一款28 GHz高功率密度、高增益Doherty功率放大器

doi:10.3969/j.issn.1000-5641.2026.02.001

摘要/Abstract

摘要：

提出了一款采用40 nm 互补金属氧化物半导体 (CMOS) 工艺的28 GHz高功率密度、高增益、单驱动4路Doherty功率放大器, 通过引入基于分布式有源变压器的级间正交功分器来代替传统的正交功分网络, 实现低插入损耗, 有效提高增益和功率密度. 此外, 设计了一款单变压器形式的混合合成网络实现功率合成与负载调制, 并对该网络进行了高功率密度优化设计. 芯片测试结果表明: 在28 GHz时, 该功率放大器的饱和输出功率达22.6 dBm, 1 dB压缩点输出功率为21.2 dBm, 峰值功率附加效率达到20.5%, 在6 dB功率回退时的功率附加效率为14.2%. 当输入100 MHz带宽的64阶正交振幅调制的正交频分复用信号时, 在 –25 dB误差矢量幅度条件下, 该款功率放大器可实现13.5 dBm的平均输出功率和9%的平均功率附加效率; 当信号带宽扩展至400 MHz时, 该功率放大器在相同误差矢量幅度指标下, 仍能维持11.3 dBm的平均输出功率和8%的平均功率附加效率. 芯片核心面积为0.38 mm², 功率密度达到0.48 W/mm².

关键词: Doherty功率放大器, 功率合成, 负载调制

Abstract:

This study presents a 28 GHz, high power density, high gain, single-drive four-way Doherty power amplifier (PA) implemented in 40 nm complementary metal-oxide-semiconductor (CMOS) technology. By replacing conventional quadrature splitting networks with a distributed active transformer-based inter-stage quadrature divider, the proposed design achieves reduced insertion loss while significantly enhancing gain and power density. Additionally, a DAT-based single output transformer is introduced to simultaneously realize power combining and load modulation, achieving an optimized high-power-density PA architecture. Measurement results indicate that at 28 GHz, the PA delivers a saturated output power of 22.6 dBm, a 1 dB output compression point of 21.2 dBm, and a power added efficiency (PAE) of 20.5%, with a PAE of 14.2% at 6 dB power back-off. Under a 100 MHz orthogonal frequency-division multiplexing signal modulated with 64-quadrature amplitude modulation, the PA delivers an average output power of 13.5 dBm and an average PAE of 9% while satisfying an error vector magnitude (EVM) requirement of –25 dB. For a 400 MHz signal bandwidth, it maintains an average output power of 11.3 dBm and an average PAE of 8% under the same EVM specification. The core occupies an active area of only 0.38 mm², corresponding to a power density of 0.48 W/mm².

Key words: Doherty PA, power combining, load modulation

中图分类号:

TN432

汪扬阳, 曹乐颖, 蒋哲奥, 张润曦. 一款28 GHz高功率密度、高增益Doherty功率放大器[J]. 华东师范大学学报（自然科学版）, 2026, 2026(2): 1-11.

Yangyang WANG, Leying CAO, Zhe’ao JIANG, Runxi ZHANG. A 28 GHz high power density and high gain Doherty power amplifier[J]. J* E* C* N* U* N* S*, 2026, 2026(2): 1-11.

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参考文献 16

1	PASHAEIFAR M, DE VREEDE L C N, ALAVI M S. 14.4 A 24-to-30 GHz double-quadrature direct-upconversion transmitter with mutual-coupling-resilient series-Doherty balanced PA for 5G MIMO arrays [C]// 2021 IEEE International Solid-State Circuits Conference (ISSCC). IEEE, 2021: 223-225.
2	MA Z L, MA K X, WANG K P, et al. A 28 GHz compact 3-way transformer-based parallel-series Doherty power amplifier with 20.4%/14.2% PAE at 6-/ 12-dB power back-off and 25.5 dBm PSAT in 55nm bulk CMOS [C]// 2022 IEEE International Solid-State Circuits Conference (ISSCC). IEEE, 2022: 320-322.
3	ZHANG X H, LI S S, HUANG D Q, et al.. A millimeter-wave three-way Doherty power amplifier for 5G NR OFDM. IEEE Journal of Solid-State Circuits, 2023, 58 (5): 1256- 1270.
4	WANG F, WANG H.. A high-power broadband multi-primary DAT-based Doherty power amplifier for mm-wave 5G applications. IEEE Journal of Solid-State Circuits, 2021, 56 (6): 1668- 1681.
5	LIU E, WANG H.. A broadband four-way parallel–series Doherty power amplifier for 5G communications. IEEE Journal of Solid-State Circuits, 2024, 59 (5): 1312- 1322.
6	LIU E, WANG H. A 26-40 GHz 4-way hybrid parallel-series role-exchange Doherty PA with broadband deep power back-off efficiency enhancement [C]// 2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC). IEEE, 2023: 185-188.
7	KUMARAN A K, PASHAEIFAR M, NEMATI H M, et al. A 26 GHz balun-first three-way Doherty PA in 40 nm CMOS with 20.7 dBm psat and 20 dB power gain [C]// 2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC). IEEE, 2023: 189-192.
8	ZHANG X H, LI S S, HUANG D Q, et al. A 38 GHz deep back-off efficiency enhancement PA with three-way Doherty network synthesis achieving 11.3 dBm average output power and 14.7% average efficiency for 5G NR OFDM [C]// 2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC). IEEE, 2022: 239-242.
9	INDIRAYANTI P, REYNAERT P. A 32 GHz 20 dBm-PSAT transformer-based Doherty power amplifier for multi-Gb/s 5G applications in 28 nm bulk CMOS [C]// 2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC). IEEE, 2017: 45-48.
10	MA Z L, MA Z, MA K X, et al.. A 28-GHz 26.8-dBm Doherty power amplifier with four-way differential hybrid load-modulated combiner in 55nm CMOS. IEEE Microwave and Wireless Technology Letters, 2023, 33 (7): 1015- 1018.
11	LEE J, BAEK S, KIM K, et al. A 45 nm RFSOI CMOS-based 24.25-29.5 GHz 2 × 16-channel phased-array transceiver IC for 5G NR applications [C]// 2024 IEEE Radio Frequency Integrated Circuits Symposium (RFIC). IEEE, 2024: 47-50.
12	GAO H Y, LU H, WANG S G, et al. A ka-band 8-element 4-beam transmitter front end with hybrid VGA and symmetrical transformer-based Doherty PA [C]// 2024 IEEE Radio Frequency Integrated Circuits Symposium (RFIC). IEEE, 2024: 7-10.
13	MORTAZAVI M, SHEN Y Y, MUL D, et al.. A four-way series Doherty digital polar transmitter at mm-wave frequencies. IEEE Journal of Solid-State Circuits, 2022, 57 (3): 803- 817.
14	KUMARAN A K, PASHAEIFAR M, ALEXANDERSON M, et al.. A single-supply balun-first three-way mm-wave Doherty PA. IEEE Transactions on Microwave Theory and Techniques, 2024, 72 (5): 2757- 2772.
15	PARK H C, KIM S, LEE J, et al.. Single transformer-based compact Doherty power amplifiers for 5G RF phased-array ICs. IEEE Journal of Solid-State Circuits, 2022, 57 (5): 1267- 1279.
16	PASHAEIFAR M, DE VREEDE L C N, ALAVI M S.. Load-modulation-based IMD3 cancellation for millimeter-wave class-B CMOS power amplifiers achieving EVM < 1.2%. IEEE Microwave and Wireless Components Letters, 2022, 32 (6): 716- 719.

数据来源	工艺	结构	f₀/GHz	增益/dB	P_SAT/dBm	OP1dB/dBm	P_max/%	P_–6dB/%	核心面积/mm²	功率密度/(W/mm²)
本文	40 nm CMOS	4路 2级	28.0	23.4	22.6	21.2	20.5	14.2	0.38	0.48
JSSC 2023^[5]	45 nm SOI	4路 2级	33.0	15.3	24.5	23.9	39.0	34.5	2.91	0.10
JSSC 2022^[13]	40 nm CMOS	4路 2级	29.5	15.0	18.7	NA	24.0	15.0	1.10	0.07
TMTT 2024^[14]	40 nm CMOS	3路 3级	26.0	20.0	20.7	15.5	22.3	11.7	0.77	0.15
TMTT 2020^[15]	28 nm CMOS	2路 2级	27.0	16.5	18.8	17.5	30.1	22.0	0.42	0.18
MWCL 2022^[16]	40 nm CMOS	2路 2级	28.0		20.1		40.6		0.37	0.28

数据来源	调制方案	测试频率/GHz	调制带宽/MHz	PAPR/dB	E_rms/dB	P_AVG/dBm	E_AVG/%
本文	64 QAM OFDM	28.0	100	11.50	–25.00	13.5	9.00
JSSC 2023^[5]	64 QAM OFDM	33.0	100	9.64	–25.20	14.3	25.20
JSSC 2022^[13]	64 QAM OFDM	29.5	300	10.70	–27.58	7.9	18.00
TMTT 2024^[14]	64 QAM OFDM	26.0	400	9.80	–24.90	9.4	14.00
TMTT 2020^[15]	64 QAM OFDM	27.0	100	>10.00	–25.00	12.4	20.20
MWCL 2022^[16]	64 QAM OFDM	28.0	50	8.90	–38.70	8.9	9.46