华东师范大学学报（自然科学版） ›› 2026, Vol. 2026 ›› Issue (2): 12-24.doi: 10.3969/j.issn.1000-5641.2026.02.002

• 射频前端与毫米波集成电路 • 上一篇    下一篇

一款用于Wi-Fi无线通信的高能效和高线性SCPA数字发射机芯片

刘灿, 赵康杰, 张润曦*()   

  1. 华东师范大学 微电子电路与系统研究所, 上海　200241
  • 收稿日期:2025-10-14 接受日期:2026-01-06 出版日期:2026-03-25 发布日期:2026-04-03
  • 通讯作者: 张润曦 E-mail:rxzhang@ee.ecnu.edu.cn
  • 基金资助:
    上海市科委资助项目 (22DZ2229004)

A high-energy-efficiency and high-linearity digital transmitter based on switched capacitor power amplifier (SCPA) for Wi-Fi communications

Can LIU, Kangjie ZHAO, Runxi ZHANG*()   

  1. Institute of Microelectronics Circuits and Systems, East China Normal University, Shanghai　200241, China
  • Received:2025-10-14 Accepted:2026-01-06 Online:2026-03-25 Published:2026-04-03
  • Contact: Runxi ZHANG E-mail:rxzhang@ee.ecnu.edu.cn

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摘要：

本文设计了一款可应用于Wi-Fi通信的2.4 GHz硅基、高输出功率、高能效、高线性度开关电容功率放大器(SCPA)数字发射机芯片. 该发射机由数字模块、射频模块两部分构成. 在射频模块中, SCPA采用10 bit分辨率同相正交 (I/Q) 架构, 利用时钟交互技术规避I/Q两路正交信号合成时的交叠损失以提升功率, 并采用交叉4路串联Doherty无源合成网络提升功率及回退效率. 在数字模块中, 通过数字预失真(DPD)处理实现了芯片整体输出线性度的优化. 该芯片采用22 nm 互补金属氧化物半导体(CMOS)工艺设计, 后仿真结果表明: 发射机在2.4 GHz处饱和输出功率为30.44 dBm, 峰值系统效率为47.73%; 在2.5、6、12 dB功率回退时, 系统效率分别为34.73%、37.92%、17.94%. 对于4096-QAM调制信号, 能够实现最终误差矢量幅度(EVM)小于 –38 dB.

关键词: 互补金属氧化物半导体, 开关电容功率放大器, 正交架构数字发射机, Doherty串联合成变压器, Wi-Fi通信

Abstract:

This paper presents a 2.4 GHz silicon-based, high output power, high energy efficiency, and high-linearity switched capacitor power amplifier (SCPA) digital transmitter chip designed for Wi-Fi communications. The transmitter comprises two main sections: a digital module and a radio frequency (RF) module. In the RF module, the SCPA adopts a 10 bit resolution in-phase/quadrature (I/Q) architecture. It employs a clock-interleaving technique to eliminate overlap losses during the combination of I/Q signals, thus improving the output power. A cross-coupled four-way series-combining Doherty passive network is utilized to boost output power and power back-off (PBO) efficiency. In the digital module, digital predistortion processing is implemented to optimize the overall linearity of the chip. The chip was designed with a 22 nm complementary metal oxide semiconductor (CMOS) process. Post-simulation results show that the transmitter achieves a saturated output power of 30.44 dBm and a peak system efficiency of 47.73% at 2.4 GHz. At 2.5 dB, 6 dB, and 12 dB PBO, the system efficiencies are 34.73%, 37.92%, and 17.94%, respectively. For a 4096-QAM modulated signal, the final error vector magnitude (EVM) can be achieved to be less than –38 dB.

Key words: complementary metal oxide semiconductor (CMOS), switched capacitor power amplifier (SCPA), in-phase/quadrature (I/Q) architecture digital transmitter, Doherty series-combining transformer, Wi-Fi communications

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