关键词: 噪声整形SAR ADC, 源跟随器, 电容堆叠, ping-pong结构, 失配误差整形

Abstract:

This paper proposes the design of a high-precision third-order noise-shaping (NS) successive approximation register (SAR) analog-to-digital converter (ADC) for audio applications. The NS effect of passive NS circuits deteriorates owing to gain loss. In response, a cascaded integral feed-forward (CIFF) active NS loop is designed. To mitigate the impact of integrator nonlinearity on the ADC, a primary-auxiliary dual-path high-linearity source follower structure is proposed. This source follower buffers the residual voltage onto the integration capacitor, ultimately achieving third-order NS performance. A mismatch error shaping (MES) technique is incorporated to mitigate nonlinearities induced by digital-to-analog converter (DAC) mismatches. Fabricated in a 55 nm CMOS process, the ADC core occupies approximately 0.25 mm². Post-layout simulation results demonstrate that under a 1.8 V supply voltage at 40℃, while operating at a sampling frequency of 8 MS/s with a bandwidth of 125 kHz and consuming 10.83 mW of power, the ADC achieves an effective number of bits (ENOB) of 15.14 and a signal-to-noise and distortion ratio (SNDR) of 92.92 dB with a Schreier figure of merit (FoM_S) of 163.54 dB.

Key words: NS SAR ADC, source follower, capacitor stacking, ping-pong architecture, MES