A 70.3~86.6 GHz broadband low-noise amplifier utilizing source-gate-coupled-transformer technique

doi:10.3969/j.issn.1000-5641.2026.02.007

Abstract

Abstract:

A 70.3~86.6 GHz low-noise amplifier (LNA) was investigated, which can be applied simultaneously to E-band communication and 77 GHz automotive radar systems. The LNA employs a three-stage differential architecture to suppress common-mode noise. In the input stage, a source-gate-coupled-transformer-based noise-cancellation and equivalent transconductance enhancement technique is implemented to simultaneously reduce noise and boost gain. Together with a single-ended-to-differential balun, the input network achieves both impedance and optimal noise matching. The intermediate stage uses a common-source configuration with neutralization capacitors to improve gain and stability, while the output stage employs a cascode topology with a common-gate short-circuit technique and dual neutralization capacitors scheme to mitigate parasitic effects and further enhance gain and stability. Additionally, an inductor is introduced between the source of the common-gate transistor and the drain of the common-source transistor to alleviate parasitic effects and extend the cutoff frequency. Simulation results demonstrate that the proposed LNA achieves a peak gain of 22.54 dB, a 3 dB bandwidth covering 70.3~86.6 GHz, and a minimum noise figure of 5.48 dB, with noise variation less than 0.69 dB across the operating band. The input and output return losses are both better than those at –8.5 dB, and the input 1 dB compression point (IP1dB) is –16.39 dBm.

Key words: low-noise amplifier, millimeter wave, broadband

CLC Number:

TN432

Leying CAO, Yangyang WANG, Yuxin SHU, Runxi ZHANG. A 70.3~86.6 GHz broadband low-noise amplifier utilizing source-gate-coupled-transformer technique[J]. J* E* C* N* U* N* S*, 2026, 2026(2): 71-81.

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数据来源	工艺	工作频段/GHz	带宽/GHz	NF/dB	增益/dB	IP1dB/dBm	功耗/mW	FOM
2025 JSSC^[19]	40 nm CMOS	70~86	16.0	4.8~6.5	16.50	–8.50	25.0	2.12
2025 RFIC^[20]	40 nm CMOS	50~68	18.0	5.6~10.0	26.20	–35.00	164.0	0.85
2024 ISCAS^[18]	28 nm CMOS	70~110	40.0	6.1	15.10	–14.00	60.6	1.22
本文	40 nm CMOS	70.3~86.6	16.3	5.48~6.17	22.54	–16.39	32.3	2.71