Abstract:

This study presents a 28 GHz, high power density, high gain, single-drive four-way Doherty power amplifier (PA) implemented in 40 nm complementary metal-oxide-semiconductor (CMOS) technology. By replacing conventional quadrature splitting networks with a distributed active transformer-based inter-stage quadrature divider, the proposed design achieves reduced insertion loss while significantly enhancing gain and power density. Additionally, a DAT-based single output transformer is introduced to simultaneously realize power combining and load modulation, achieving an optimized high-power-density PA architecture. Measurement results indicate that at 28 GHz, the PA delivers a saturated output power of 22.6 dBm, a 1 dB output compression point of 21.2 dBm, and a power added efficiency (PAE) of 20.5%, with a PAE of 14.2% at 6 dB power back-off. Under a 100 MHz orthogonal frequency-division multiplexing signal modulated with 64-quadrature amplitude modulation, the PA delivers an average output power of 13.5 dBm and an average PAE of 9% while satisfying an error vector magnitude (EVM) requirement of –25 dB. For a 400 MHz signal bandwidth, it maintains an average output power of 11.3 dBm and an average PAE of 8% under the same EVM specification. The core occupies an active area of only 0.38 mm², corresponding to a power density of 0.48 W/mm².

Key words: Doherty PA, power combining, load modulation